Multi-level inverter with flying capacitor topology
US9318974B2 · kind B2 · utility
14Cited by
720References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2014 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | Sep 13, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/4835
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multi-level inverter having one or more banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.