High-speed CMOS ring voltage controlled oscillator with low supply sensitivity
US9319031B2 · kind B2 · utility
2Cited by
18References
9Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 25, 2014 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | Mar 25, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B2202/042
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
High-speed CMOS ring voltage controlled oscillators with low supply sensitivity have been disclosed. According to one embodiment, a CML ring oscillator comprises a CML negative impedance compensation circuit comprising two cross coupled transistors and a resistor connected to the two transistors for resistive biasing and a CML interpolating delay cell connected in parallel with the CML negative impedance compensation. An impedance change of the CML negative impedance compensation due to supply variation counteracts an impedance change of the CML interpolating delay cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.