Ramp signal generating circuit and signal generator, array substrate and display apparatus
US9319032B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2014 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | Apr 28, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/066
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A ramp signal generating circuit and ramp signal generator, an array substrate and a display apparatus. The ramp signal generating circuit comprises a first shift register (11), a second shift register possessing a bidirectional scanning function (12), a voltage decreasing unit (13) and a sampling unit (14); the voltage decreasing unit (13) is connected to a power supply input terminal and a ground terminal and is configured to continuously decrease a voltage inputted from the power supply input terminal stage by stage; the first shift register (11) is connected to the voltage decreasing unit (13) and is configured to control the voltage decreasing unit (13) to output voltages which are decreased continuously stage by stage; the sampling unit (14) has an output terminal and is connected to the voltage decreasing unit (13); the second shift register (12) is connected to the sampling unit (14) and is configured to control, through bidirectional scanning, the sampling unit (13) to sample and output the voltages which are decreased continuously stage by stage by the voltage decreasing unit (13). Such ramp signal generating circuit is capable of reducing area of the ramp signal generati…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.