Signal processor and communication device
US9319162B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2013 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | Nov 20, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/40241
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A signal processor includes a period detection section which detects that a period is currently used for communication of a frame; a pattern detection section which detects, from the received signal, a first signal pattern by which the end of communication of the frame is recognized; and an output processing section which outputs the received signal to a controller; configured to instruct, upon detection of the first signal pattern in the period being currently used for communication of a frame, the controller to halt startup of communication action of the next frame, until the period being currently used for communication of a frame comes to the end, to thereby reduce an event such that frames are transmitted from a plurality of communication devices simultaneously, and to thereby allow the communication action for the next frame to proceed correctly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.