Circuit for generating a start sequence and method for generating a start sequence
US9323665B2 · kind B2 · utility
0Cited by
3References
16Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 24, 2012 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Jul 23, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to a circuit and to a method for generating a start sequence. The circuit comprises at least one partially programmable memory (nonvol) for storing an encoded start sequence (Ni) and a control unit (CTRL), which is equipped to read the encoded start sequence (Ni) and decode it into a decoded start sequence (dNi) and to generate a target register address (n) depending on the decoded start sequence (dNi). An addressable memory (vol) is provided, to which the decoded start sequence (dNi) can be written by means of the control unit (CTRL) at the target register address (n).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.