Patent · US Active

System and method for managing trim operations in a flash memory system using mapping tables and block status tables

US9323667B2 · kind B2 · utility

317Cited by
0References
2Claims
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Key dates

Filing dateApr 10, 2013
Grant dateApr 26, 2016
Priority date
Expiry dateApr 19, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7209
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and system for managing a flash memory system facilitates the use of TRIM or similar operations so as to release physical memory space of logical block addresses (LBAs) that are declared to be deleted by a user file management system. A plurality of data structures corresponding to levels of indirection are used to manage the mapping between a user logical block address and the physical location of the data in the flash memory system and to respond to user read and write requests by determining the current status of the user logical block address in the frame of reference of the memory system. This process substantially decouples TRIM management from garbage collection and wear leveling operations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.