Filtering snoop traffic in a multiprocessor computing system
US9323675B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2013 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Sep 23, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Filtering snoop traffic in a multiprocessor computing system, each processor in the multiprocessor computing system coupled to a high level cache and a low level cache, the including: receiving a snoop message that identifies an address in shared memory targeted by a write operation; identifying a set in the high level cache that maps to the address in shared memory; determining whether the high level cache includes an entry associated with the address in shared memory; responsive to determining that the high level cache does not include an entry corresponding to the address in shared memory: determining whether the set in the high level cache has been bypassed by an entry in the low level cache; and responsive to determining that the set in the high level cache has not been bypassed by an entry in the low level cache, discarding the snoop message.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.