Facilitating resource use in multicyle arbitration for single cycle data transfer
US9323703B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 2013 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Jul 17, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are disclosed to provide arbitration between input ports and output ports of a switch. For each of at least one input port of a group of input ports, a respective request is received specifying for the respective input port to be allocated a clock cycle in which to send data to a group of output ports. A grant of the request of a primary input port is issued at each clock cycle, the primary input port including a first input port of the at least one input port. Upon a determination, subsequent to a first clock cycle count elapsing, that an input arbiter has not yet accepted any grant of the request of the primary input port, a grant is issued at each clock cycle, including alternating between issuing a grant of the request of the primary input port and of an alternate input port, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.