Self-compensating gate driving circuit
US9324288B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 14, 2014 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Sep 25, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a self-compensating gate driving circuit which comprises a plurality of GOA units which are cascade-connected, and a Nth GOA unit controls charge to a Nth horizontal scanning line G(n) in a display area. The Nth GOA unit comprises a pull-up controlling part, a pull-up part, a transmission part, a first pull-down part, a bootstrap capacitor part and a pull-down holding part. The pull-up part, the first pull-down part, the bootstrap capacitor part and the pull-down holding part are respectively coupled to a Nth gate signal point Q(N) and the Nth horizontal scanning line G(n), and the pull-up controlling part and the transmission part are respectively coupled to the Nth gate signal point Q(N), and the pull-down holding part is inputted with a DC low voltage VSS.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.