Methods of manufacturing semiconductor devices having high aspect ratio
US9324609B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2015 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Mar 30, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming a hard mask capable of implementing an electrode having a high aspect ratio are provided. A molding layer may be formed on a substrate. A sacrificial layer may be formed on the molding layer. First mask patterns may be formed in parallel in the sacrificial layer. After the first mask patterns are formed, second mask patterns, which cross the first mask patterns and are in parallel, may be formed in the sacrificial layer. The first mask patterns and the second mask patterns may have materials more opaque than the sacrificial layer. Upper surfaces of the sacrificial layer, the first mask patterns and the second mask patterns may be exposed at the same horizontal level. The sacrificial layer may be removed. Openings, which pass through the molding layer, may be formed using the first mask patterns and the second mask patterns as etch masks. Electrodes may be formed in the openings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.