Method and system of intelligent error correction for hardware data storages
US9325348B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 2014 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Nov 22, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/616
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods and systems for correction of errors on a hardware data storage are provided. An example method for correction of errors on a hardware data storage can include receiving input data. The input data may include at least error statistics data and reliability data. The method can further include creating a set of matrices with predefined properties. The set of matrices can be created based on the input data. The set of matrices may include at least a generating matrix, a parity check matrix, and a decoding matrix. The method can continue with detecting the errors using the set of matrices. Upon detection of the errors, the method may further include correcting the errors using the set of matrices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.