Determining hierarchical paths to nodes
US9330116B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2013 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Jan 3, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/2246
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, machines, and stored instructions are provided for determining hierarchical paths to nodes based on stored information about the nodes. A node analyzer analyzes a hierarchy to create mappings that represent the hierarchy. The mappings may include a “parent mapping” that maps selected-level nodes to parent nodes of the selected-level nodes, and a “path mapping” that maps a plurality of nodes other than the selected-level nodes to a plurality of paths, within the hierarchy, to the plurality of nodes. A path module then determines path(s) to specified node(s) at least in part by mapping the specified node(s) to particular parent node(s) of the specified node(s) using the parent mapping. The path module also maps the particular parent node(s) to particular path(s) using the path mapping. The information from the path and parent mappings may be assembled to form path(s) within the hierarchy to the specified node(s).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.