Method and apparatus for dummy cell placement management

US9330224B2 · kind B2 · utility

Assignee

• Oracle International Corporation · US

Inventors

• Duo Ding · Austin, US
• Srinivas Sanivarapu · Cedar Park, US
• Lai-ching Lydia So · Cupertino, US
• Joseph Curt Peters · Austin, US
• Carl Alfred Shisler · Austin, US
• Gary Lynn Fowler · Leander, US
• Thuvan Le · San Jose, US
• Kaiwha Peng · Santa Clara, US
• Tao Hou · Palo Alto, US
• Wilson Fai Chin · Cupertino, US

Key dates

• Filing date: Apr 30, 2014
• Grant date: May 3, 2016
• Expiry date: Jul 12, 2034

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02P90/02
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A method for manipulating a circuit design includes receiving multiple dummy cell modification parameters, selecting, by a computer processor and based on the dummy cell modification parameters, a dummy cell insertion region on a circuit design, and generating, in the dummy cell insertion region, multiple dummy cells. The method further includes selecting a first dummy cell from the dummy cells, determining, by the computer processor and based on a location of the first dummy cell, an illegal overlap with the first dummy cell, and removing, by the computer processor and from the dummy cells, the first dummy cell. The method further includes inserting, by the computer processor, on the circuit design, and after removing the first dummy cell, the dummy cells to obtain a modified circuit design, and presenting the modified circuit design.