Memory cores of resistive type memory devices, resistive type memory devices and method of sensing data in the same
US9330743B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 2015 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Apr 3, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/82
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory core of a resistive type memory device includes at least a first resistive type memory cell coupled to a bit-line, a first resistance to voltage converter and a bit-line sense amplifier. The first resistance to voltage converter is coupled to the bit-line at a first node. The first resistance to voltage converter converts a resistance of the first resistive type memory cell to a corresponding voltage based on a read column selection signal. The bit-line sense amplifier is coupled to the bit-line at the first node and is coupled to a complementary bit-line at a second node. The bit-line sense amplifier senses and amplifies a voltage difference of the bit-line and the complementary bit-line in response to a sensing control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.