Semiconductor device and method of manufacturing the same
US9330921B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2015 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Feb 19, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/681
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided. The semiconductor device includes a semiconductor substrate, and a memory cell disposed on the semiconductor substrate. The memory cell includes a selection transistor and a memory transistor. The selection transistor includes a selection gate, a first source, and a first drain. The memory transistor includes a floating gate, a control gate, a second source, a second drain, and a first insulating layer disposed between the floating gate and the control gate. The semiconductor device further includes a selection gate sidewall spacer disposed near an edge of a bit line of the selection gate of the selection transistor. The selection gate sidewall spacer is separated from the selection gate by a second insulating layer. The selection gate sidewall spacer and the control gate are formed of a first material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.