Manufacture of coated copper pillars
US9331040B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2013 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Jul 19, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3841
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method for forming a copper pillar on a semiconducting substrate, the copper pillar having an underbump metallization area comprising a metal less noble than copper and optionally a solder bump on the top portion, and having a layer of a second metal selected from tin, tin alloys, silver, and silver alloys deposited onto the side walls of said copper pillar. A layer of a first metal which is more noble than copper is deposited onto the entire outer surface of the copper pillar prior to deposition of the second metal layer. The layer of a second metal then has at least a reduced number of undesired pin-holes and serves as a protection layer for the underlying copper pillar.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.