Semiconductor device
US9331196B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2014 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Oct 2, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/153
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a gate structure, a source region, a drain region, a first conductive type epitaxial layer, a high voltage second conductive type well, a linear graded high voltage first conductive type well and a first conductive type buried layer is provided. The first conductive type buried layer is located within the first conductive type epitaxial layer and below the high voltage second conductive type well, and a length of the first conductive type buried layer is smaller than a length of the high voltage second conductive type well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.