Network and method for implementing a high-availability grand master clock
US9331805B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 2, 2012 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Aug 25, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0676
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
In a network based on IEEE 1588, comprising a plurality of nodes (201, 501) and a plurality of connections where each connection connects at least two nodes to allow communication between nodes including the exchange of messages according to a network protocol, the synchronization of IEEE 1588 is improved by allowing multiple grandmaster clocks (701) to operate simultaneously in the system. Thus, the re-election protocol of IEEE 1588 is made obsolete. For this, a multitude of nodes form a subsystem implementing a high-availability grand master clock (301) according to the IEEE 1588 Standard, wherein the subsystem is configured to tolerate the failure of at least one of said nodes forming said subsystem. Bi-directional communication link (401) are configured for physically connecting a IEEE 1588 Master clocks (201) and/or IEEE 1588 Slave clocks (201) to the subsystem implementing a high-availability grand master clock (301).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.