Data synchronization apparatus
US9331841B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2013 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Feb 13, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M9/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Provided is a data synchronization apparatus. The data synchronization apparatus includes a signal conversion block converting individual serial digital signals into parallel digital signals in response to a load signal and converting the parallel digital signals into synchronized serial digital signals in response to a synchronization load signal which does not overlap the load signal, a clock/load signal generator outputting a reference load signal for generating the synchronization load signal to the signal conversion block, a multiplexer multiplexing the synchronized serial digital signals, and a first serial-to-parallel (S/P) converting the multiplexed signal into parallel signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.