Method for system for manufacturing TFT, TFT, and array substrate
US9337312B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 17, 2013 |
| Grant date | May 10, 2016 |
| Priority date | — |
| Expiry date | Dec 17, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/0231
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The method for manufacturing the TFT includes: forming a semiconductor film, a doped semiconductor film, a source/drain electrode film, and a first patterned photoresist layer sequentially; performing first etching to remove the source/drain electrode film on a region that is not covered by the first patterned photoresist layer; performing second etching to remove the doped semiconductor film and the semiconductor film on a region that is not covered by the first patterned photoresist layer; performing ashing treatment on the photoresist layer to remove the photoresist layer on the channel region; hard-baking the photoresist layer after the ashing treatment; performing third etching to remove the source/drain electrode film on a region that is not covered by the photoresist layer; and performing fourth etching to remove the doped semiconductor film on the region that is not covered by the photoresist layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.