Patent · US Active

Drive circuit with adjustable dead time

US9337824B2 · kind B2 · utility

10Cited by

12References

25Claims

0Family size

Assignee

Infineon Technologies Austria AG · AT

Inventors

Marco Piselli · Padova, IT
Simone Massaro · Mansfield, US
Michael Lenz · Zorneding, DE
Marco Puerschel · Munich, DE
Dusan Graovac · Munich, DE

Key dates

Filing date	Jul 13, 2011
Grant date	May 10, 2016
Priority date	—
Expiry date	Oct 11, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH03K2217/0072
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A drive circuit includes a first input terminal configured to receive a first input signal, a first output terminal configured to provide a first drive signal, a second output terminal configured to provide a second drive signal, and a mode selection terminal configured to have a mode selection element connected thereto. The drive circuit is configured to generate the first and second drive signals dependent on the first input signal such that there is a dead time between a time when one of the first and second drive signals assumes an off-level and a time when the other one of the first and second drive signals assumes an on-level, and evaluate at least one electrical parameter of the mode selection element and is configured to adjust a first signal range of the first drive signal and a second signal range of the second drive signal dependent on the evaluated parameter and to adjust the dead time dependent on the evaluated parameter.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.