High-speed digital signal processing systems
US9337874B1 · kind B1 · utility
6Cited by
42References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2014 |
| Grant date | May 10, 2016 |
| Priority date | — |
| Expiry date | Dec 18, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/804
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Apparatus and method to provide a high speed digital signal processor may implemented in a substantially all digital transmitter designs. In an embodiment, input binary bits are divided into two sets of bits, where one set is provided to a binary to thermometer coder to generate an output mixed with a clock signal to operatively provide a reverse order inverted bit pattern. The other set of binary bits is subject to exclusive-or processing such that processing of the two sets operatively provides a mixed hybrid code to be fed from high speed digital signal processor. Additional apparatus, systems, and methods are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.