Method of driving a gate line, gate drive circuit and display apparatus having the gate drive circuit
US9343028B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2009 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Dec 22, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of driving a gate line includes: charging one of a scan start signal and a carry signal provided from a previous stage to a first node of a present stage; outputting a gate signal through a gate node of the present stage by pulling up a high level of a first clock signal at the first node to boost up a voltage potential of the first node; discharging the voltage potential of the first node and a voltage potential of the gate node to hold the first node and the gate node at a first power voltage as the first clock signal is shifted to a low level; and receiving a voltage potential signal of a second node of the previous stage, the second node holding a gate signal outputted from the previous stage, to reduce a ripple generated at the first node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.