Gate driving circuit and display apparatus including the same
US9343030B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2010 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Apr 16, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driving circuit includes N stages (where N is a natural number greater than or equal to 2). The N stages are cascaded, and each of the N stages has a gate line connected thereto. A first stage group includes k stages of the N stages (where k is a natural number less than N), and the first stage group outputs a first output signal in response to a start signal. A second stage group (including N−k stages) generates a second output signal in response to the first output signal and outputs the second output signal to a corresponding gate line. The first stage group includes a first buffer and a second buffer, each of which receives the start signal. A size of the first buffer is smaller than a size of the second buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.