Accessing control registers over a data bus
US9343177B2 · kind B2 · utility
1Cited by
6References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 1, 2013 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Feb 23, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4204
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic apparatus that includes a controlled device with a plurality of control registers. A data bus is coupled between the controlled device and a processor, and an interface is configured to receive a plurality of portions of data read from or to be written to the plurality of control registers. The electronic apparatus also includes a correlation circuit configured to associate at least some of the plurality of portions of data with respective physical addresses of the plurality of control registers based on respective positions of the respective portions of data within the plurality.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.