Patent · US Active

Semiconductor packages having a guide wall and related systems and methods

US9343535B2 · kind B2 · utility

7Cited by
6References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 6, 2013
Grant dateMay 17, 2016
Priority date
Expiry dateOct 31, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/1815
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor package includes a first package board, a first semiconductor chip arranged on the first package board, a heat transfer layer arranged on the first semiconductor chip, a heat spreader arranged on the heat transfer layer, and a housing having a molding part arranged on the first package board and directly surrounding side surfaces of the first semiconductor chip and a guide wall arranged on the molding part, with the guide wall spaced apart from the heat spreader and surrounding side surfaces of the heat spreader.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.