Manufacturing method of thin film transistor of display device
US9343548B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2015 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Jun 25, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1213
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method of a thin film transistor of a display device, the method including forming a gate insulating layer on a semiconductor layer; attaching a halftone mask onto the gate insulating layer; forming a channel region including a plurality of bridged grain lines formed; exposing the gate insulating layer of the channel region; forming a gate electrode layer on the halftone mask and the gate insulating layer; forming a gate electrode on the channel region by etching a portion corresponding to a boundary of the channel region of the gate electrode layer; removing the halftone mask; forming source/drain regions; forming an interlayer insulating layer on the gate electrode and the gate insulating layer; forming contact holes by etching the gate insulating layer and the interlayer insulating layer to expose the source/drain regions; and forming source/drain electrodes connected with the source/drain regions through the contact holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.