Frequency divider, clock generating apparatus, and method capable of calibrating frequency drift of oscillator
US9344065B2 · kind B2 · utility
1Cited by
3References
14Claims
0Family size
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Key dates
| Filing date | Oct 7, 2013 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Dec 26, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1976
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clock generating apparatus includes an oscillator and a frequency synthesizer. The oscillator is utilized for generating a reference clock signal. The frequency synthesizer is coupled to the oscillator and utilized for synthesizing a target clock signal in accordance with the reference clock signal and a frequency division factor that has been adjusted or compensated, and outputting the target clock signal as an output of the clock generating apparatus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.