Patent · US Active

Phase alignment architecture for ultra high-speed data path

US9344268B1 · kind B1 · utility

1Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 25, 2015
Grant dateMay 17, 2016
Priority date
Expiry dateMar 25, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L7/0025
  • WIPO fieldTelecommunications
  • WIPO sectorElectrical engineering

Abstract

A phase alignment architecture enhances the performance of communication systems. The architecture aligns a divided clock (e.g., in differential Inphase (I) and Quadrature (Q)) to a main clock, even at extremely high speeds, where skew variations of the divided clock are comparable to the main clock period. The improvement in phase alignment facilitates ultra high-speed communications.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.