Decision circuit, receiver device, and processor
US9344309B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2014 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | May 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B7/0447
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A decision circuit includes: a first decision block to distinguish a first bit of bits using an amplitude of an analog signal as a discrimination point, the analog signal being an amplitude shift keyed signal; a superposition block to acquire an absolute value of a difference of the analog signal in respect to an amplitude center value of the analog signal by superposing divided analog signals; an inversion block to control inverting of the signal based on a first distinction result of the first decision block; a second decision block to distinguish a second bit of the bits based on an amplitude of an output signal from the inversion block and the discrimination point; and an output buffer to output the first distinction result and a second distinction result of the second decision block in synchronization with a clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.