Method of manufacturing a planarizing printed electronic device
US9345123B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 3, 2013 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Feb 11, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/805
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a planarized printed electronic device includes performing a surface treatment on a base substrate to provide a surface treated base substrate and facilitate release during a delamination process; printing a layer having an electrode pattern onto the surface-treated base substrate; forming an organic material layer comprised of an organic material on the base substrate on which the printed layer is printed such that the printed layer is embedded therein to provide an embedded layer; providing a target substrate onto which the embedded layer is to be transferred; laminating by sandwiching the embedded layer between the base substrate on which the embedded layer is formed and the target substrate; delaminating by detaching the embedded layer from the base substrate; and transferring the printed layer onto the target substrate to provide a planarized printed layer. Large areas with reduced defects due to surface roughness are possible.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.