Patent · US Active

Ascertaining command completion in flash memories

US9348537B2 · kind B2 · utility

4Cited by

22References

26Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Dolev Raviv · Kiryat Yam, IL
Tatyana Brokhman · Kiryat Ata, IL
Maya Haim · Haifa, IL
Assaf Shacham · Jerusalem, IL

Key dates

Filing date	Aug 25, 2014
Grant date	May 24, 2016
Priority date	—
Expiry date	Oct 9, 2034

Classification

Technology area (CPC G)Physics
CPC primaryG06F2206/1014
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Ascertaining command completion in flash memories is disclosed. An exemplary aspect includes eliminating the software lock and the outstanding requests variable and replacing them with a transfer request completion register. The transfer request completion register may be mapped to the universal flash storage (UFS) Transfer Protocol (UTP) Transfer Request List (UTRL) slots. The controller of the host—a hardware component—may set the bit in the transfer request completion register on transfer request completion at the same time the doorbell register is cleared. After this bit has been read, the bit in the transfer request completion register is cleared.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.