Non-volatile semiconductor memory device with temporary data retention cells and control method thereof
US9348770B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2014 |
| Grant date | May 24, 2016 |
| Priority date | — |
| Expiry date | Dec 19, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-violate memory device and a control method thereof are provided. The non-violate memory device includes a flip-flop, a retention cell and a memory cell. The flip-flop includes an output inverter. The flip-flop generates a second data according to a first data and a retention signal. The retention cell is coupled to the output inverter of the flip-flop. The retention cell temporarily stores the second data when the retention signal is enabled. During the period that retention signal is enabled, the memory cell stores the second data temporarily stored by the retention cell. Thus, another operation mode of the non-violate memory device is provided to save more power.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.