Integrated voltage regulator with embedded passive device(s) for a stacked IC
US9349692B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 4, 2015 |
| Grant date | May 24, 2016 |
| Priority date | — |
| Expiry date | May 4, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stacked integrated circuit includes a first tier IC and a second tier IC. Active faces of the first tier IC and the second tier IC face each other. An interconnect structure, such as microbumps, couples the first tier IC to the second tier IC. An active portion of a voltage regulator is integrated in the first semiconductor IC and coupled to passive components (for example a capacitor or an inductor) embedded in a packaging substrate on which the stacked IC is mounted. The passive components may be multiple through vias in the packaging substrate providing inductance to the active portion of the voltage regulator. The inductance provided to the active portion of the voltage regulator is increased by coupling the through via in the packaging substrate to through vias in a printed circuit board that the packaging substrate is mounted on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.