Semiconductor device including spacers having different dimensions
US9349817B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2014 |
| Grant date | May 24, 2016 |
| Priority date | — |
| Expiry date | Feb 3, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28088
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the disclosure provide semiconductor device structures and methods of forming the same. The semiconductor device structure includes a metal gate over a substrate. A first spacer is formed over sidewalls of the metal gate and having a first height. A second spacer is formed over the sidewalls of the metal gate and having a second height. The first height is higher than the second height. The first spacer is farther from the sidewalls of the metal gate than the second spacer. In addition, the semiconductor device structure includes a dielectric layer formed over the substrate to surround the first spacer and the metal gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.