Clock signal generating circuit and video signal processing circuit using same
US9350361B2 · kind B2 · utility
0Cited by
3References
18Claims
0Family size
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Key dates
| Filing date | Dec 27, 2013 |
| Grant date | May 24, 2016 |
| Priority date | — |
| Expiry date | Jun 30, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/073
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A clock signal generating circuit includes a crystal oscillator, a phase compensation circuit, a negative resistance compensation circuit, and a high pass filter circuit. The crystal oscillator generates a clock signal. The phase compensation circuit compensates a phase of the clock signal. The negative resistance compensation circuit filters phase noises of the clock signal. The high pass filter circuit filters low frequency noises of the clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.