Transceiver suitable for multiple power level operation and method therefor
US9350412B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2014 |
| Grant date | May 24, 2016 |
| Priority date | — |
| Expiry date | Dec 2, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/0408
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A transceiver comprises a transmit/receive terminal, a receiver input terminal, a scalable impedance network, a plurality of power amplifiers, and a receiver. The scalable impedance network is coupled between the transmit/receive terminal and the receiver input terminal and has a plurality of taps in an order between the transmit/receive terminal and the receiver input terminal, in which an impedance looking into any given tap toward the transmit/receive terminal is smaller than an impedance looking into a subsequent tap toward the transmit/receive terminal, if any, in the order. The plurality of power amplifiers are arranged in an order and have outputs respectively coupled to the plurality of taps of the scalable impedance network. A power of any given power amplifier is higher than a power of a subsequent power amplifier, if any, in the order. The receiver is coupled to the receiver input terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.