Buffer circuit for a LDO regulator
US9354649B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2014 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | Dec 4, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/017518
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
In one embodiment, a circuit includes a first transistor having a control terminal, a first terminal, and a second terminal where the first transistor is a first device type. The control terminal of the first transistor receives an input signal. The circuit also includes a second transistor having a control terminal, a first terminal, and a second terminal where the second transistor is a second device type. The control terminal of the second transistor is coupled to the second terminal of the first transistor. A voltage shift circuit has an input coupled to the first terminal of the first transistor and an output coupled to the first terminal of the second transistor and a voltage between the input of the voltage shift circuit and an output of the voltage shift circuit increases as a current from the output of the voltage shift circuit increases.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.