Systems and methods for adjusting core voltage to optimize power savings
US9354690B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2011 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | Oct 15, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for adjusting core voltage of an integrated circuit to optimize power savings has a ring oscillator on the integrated circuit for providing a ring oscillator signal. The system also has compare logic on the integrated circuit configured to compare the ring oscillator signal with a clock signal from a clock external to the integrated circuit. The compare logic is configured to make a determination whether a frequency of the clock signal is within a predefined margin of a frequency of the ring oscillator and to adjust the core voltage of the integrated circuit based on the determination. Through such adjustments, the core voltage is lowered while ensuring that the core voltage does not reach a point that causes timing errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.