Method of controlling memory system in the event of sudden power off
US9355025B2 · kind B2 · utility
3Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2013 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | Nov 10, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of controlling a memory system that comprises a first flash memory device and a memory controller, the method comprising counting a first timeout when a sudden power off occurs, resetting the first flash memory device when the first timeout expires, and dumping data to the first flash memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.