Display apparatus having a gate drive circuit
US9355741B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2014 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | May 13, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate drive circuit includes a shift register having a plurality of stages, in which an n-th stage (‘n’ is a natural number) of the plurality of stages is connected to at least one subsequent stage. The n-th stage includes a pull-up part configured to output a high voltage of an n-th gate signal using a high voltage of a clock signal as in response to a high voltage of a control node, a control pull-down part configured to pull-down a voltage of the control node into a low voltage in response to a carry signal outputted from at least one of next stages of the n-th stage and receiving a back-bias voltage corresponding to the low voltage, and a carry part configured to output the high voltage of the clock signal as an n-th carry signal in response to a high voltage of the control node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.