Broadband linear amplifier architecture by combining two distributed amplifiers
US9356564B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2014 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | Mar 27, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/432
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A broadband linear amplifier including an input, a first distributed amplifier coupled to the input and having a bias for one of Class A or Class AB operation, the first distributed amplifier including a first plurality of field effect transistors and having a first output, a second distributed amplifier coupled to the input and having a bias for Class C operation, the second distributed amplifier including a second plurality of field effect transistors and having a second output, and a summed output coupled to the first output and the second output, wherein gate widths of the first plurality of field effect transistors monotonically decrease from the input to the first output, and wherein gate widths of the second plurality of field effect transistors monotonically decrease from the input to the second output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.