Linearity of phase interpolators using capacitive elements
US9356588B2 · kind B2 · utility
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4References
17Claims
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Key dates
| Filing date | Jun 9, 2014 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | Oct 7, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00286
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase interpolator, including: a pair of load resistors coupled to a supply voltage; a plurality of branches coupled to the pair of load resistors, each branch including a differential pair of transistors connected at source terminal to form a source node; a plurality of tail current sources, each tail current source coupled to one of the source nodes; and a plurality of coupling capacitors, each coupling capacitor coupled between the source nodes in two adjacent branches of the plurality of branches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.