Apparatus and method for controlling memory clock frequency in wireless communication system
US9357555B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2013 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | Feb 15, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/08
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention prevents performance degradation caused by a multiplication frequency of a memory clock in a wireless communication system by changing a frequency of the memory clock so that a multiplication frequency is not sufficiently close to a transmission/reception frequency that will cause noise or interference with a data transmission/reception. A communication apparatus according to the present invention includes a controller comprising at least one processor; and a memory for operating at a clock provided from the controller. The controller checks a communication frequency, determines whether the communication frequency is a value in a range of interference from a multiplication frequency of a memory clock frequency, and changes the memory clock frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.