Embedded non-volatile memory with single polysilicon layer memory cells programmable through band-to-band tunneling-induced hot electron and erasable through fowler-nordheim tunneling
US9361982B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2015 |
| Grant date | Jun 7, 2016 |
| Priority date | — |
| Expiry date | Jan 26, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory includes a plurality of memory cells arranged in a plurality of rows and columns. Each memory cell includes a read portion and a control portion. The read portion and the control portion share an electrically floating layer of conductive material defining a first capacitive coupling with the read portion and a second capacitive coupling with the control portion. The first capacitive coupling defines a first capacity greater than a second capacity defined by the second capacitive coupling. The control portion is configured so that an electric current injects or extracts charge carriers into or from the electrically floating layer to store of a first logic value or a second logic value, respectively, in the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.