Method and apparatus for fast frequency acquisition in PLL system
US9362924B1 · kind B1 · utility
6Cited by
1References
20Claims
0Family size
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Key dates
| Filing date | Jul 8, 2015 |
| Grant date | Jun 7, 2016 |
| Priority date | — |
| Expiry date | Jul 8, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03J2200/15
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Method and Apparatus for Fast Frequency Acquisition in PLL System has been disclosed. In one implementation a time to digital converter is used with cycle slip detection for fast acquisition and lock. In one implementation cycle slip detection is applied to determine if a feedback clock from an oscillator is faster than a reference clock or not in one measurement cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.