Semiconductor device
US9362931B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2015 |
| Grant date | Jun 7, 2016 |
| Priority date | — |
| Expiry date | Jun 25, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/38
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
There is provided a semiconductor device using low electric power and a small area which can realize highly accurate calibration. The semiconductor device according to the embodiment includes an A/D conversion unit, and a hold signal generating circuit which is coupled to an input side of the A/D conversion unit, and has a hold period not less than two cycles of the A/D conversion unit. The hold signal generating circuit includes: an SC integrator including an input buffer coupled to the input side of the A/D conversion unit, and feedback capacitor coupled to an input and an output of the input buffer; and a logic circuit which compares an output signal of plural bits outputted from the A/D conversion unit with a first and a second threshold values, and outputs a control signal which controls polarity of the SC integrator according to a comparison result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.