Receiver architecture for dual receiver signal level and interference detection in microwave digital radio applications
US9362964B2 · kind B2 · utility
1Cited by
3References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2013 |
| Grant date | Jun 7, 2016 |
| Priority date | — |
| Expiry date | Apr 29, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/1045
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A microwave radio receiver includes a first down-converter, a second down-converter, and a combined receiver signal level (RSL) and interference detector. The first down-converter is configured to convert a RF signal into a first IF signal. The second down-converter is configured to convert the first IF signal into a second IF signal. The combined RSL and interference detector is configured to determine one or more RSLs and generate an interference indicator based on the first IF signal from the first down-converter and a control signal from the second down-converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.