FSK decoding using envelope comparison in the digital domain
US9363119B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2015 |
| Grant date | Jun 7, 2016 |
| Priority date | — |
| Expiry date | Jul 29, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/152
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method of FSK decoding includes generating a pulse waveform (R'Edge) from a received FSK encoded signal (FSK signal) and a system clock (Sys_clk). From R'Edge and Sys_clk clocks are generated including a first clock and second clock framing a logic ‘0’ level of the FSK signal, and a third clock and fourth clock framing a logic ‘1’ level of the FSK signal. At least four frequency envelopes are generated from the clocks including a logic ‘0’ envelope, a logic ‘1’ envelope, a lower frequency envelope below the logic ‘0’ envelope, and an upper frequency envelope above the logic ‘1’ envelope. R'Edge is compared to the four envelopes, and a decoded output is produced, logic ‘0’ if the R'Edge overlaps the logic ‘0’ envelope, logic ‘1’ if R'Edge overlaps the logic ‘1’ envelope, and a previous output state if R'Edge does not overlap the logic ‘0’ or logic ‘1’ envelope.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.