Motion vector sign bit hiding
US9363512B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2013 |
| Grant date | Jun 7, 2016 |
| Priority date | — |
| Expiry date | Sep 1, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/52
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Methods of encoding and decoding for video data for encoding or decoding motion vector difference components for inter-coded video are described. The sign of one of the components is hidden within the parity of the sum of the magnitudes of the horizontal and vertical difference components. The sign of the other of the components is explicitly signaled in the bitstream. The hidden sign may be assigned to the larger in magnitude of the two components. In other cases, the hidden sign may always be assigned to the horizontal or vertical component. In another case, the hidden sign may always be assigned to one component, unless that component is zero, in which case the hidden sign is assigned to the other component. In another case, both components may have their signs hidden, in which case the sign hiding is based on their respective parity, rather than the parity of their sum.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.